Intel Microprocessors, The. (Record no. 25540)

MARC details
000 -LEADER
fixed length control field 10643nam a22003853i 4500
001 - CONTROL NUMBER
control field EBC5125712
003 - CONTROL NUMBER IDENTIFIER
control field MiAaPQ
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20190104144454.0
006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS--GENERAL INFORMATION
fixed length control field m o d |
007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION
fixed length control field cr cnu||||||||
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 181231s2008 xx o ||||0 eng d
020 ## - INTERNATIONAL STANDARD BOOK NUMBER
International Standard Book Number 9788131740088
Qualifying information (electronic bk.)
035 ## - SYSTEM CONTROL NUMBER
System control number (MiAaPQ)EBC5125712
035 ## - SYSTEM CONTROL NUMBER
System control number (Au-PeEL)EBL5125712
035 ## - SYSTEM CONTROL NUMBER
System control number (CaONFJC)MIL269378
035 ## - SYSTEM CONTROL NUMBER
System control number (OCoLC)1024278793
040 ## - CATALOGING SOURCE
Original cataloging agency MiAaPQ
Language of cataloging eng
Description conventions rda
-- pn
Transcribing agency MiAaPQ
Modifying agency MiAaPQ
082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER
Edition number 23rd
Classification number 004.165
100 1# - MAIN ENTRY--PERSONAL NAME
Personal name Brey, Barry B.
245 10 - TITLE STATEMENT
Title Intel Microprocessors, The.
250 ## - EDITION STATEMENT
Edition statement 8th ed.
300 ## - PHYSICAL DESCRIPTION
Extent 1 online resource (944 pages)
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note Cover -- CONTENTS -- CHAPTER 1 INTRODUCTION TO THE MICROPROCESSOR AND COMPUTER -- Introduction/Chapter Objectives -- 1-1 A Historical Background -- The Mechanical Age -- The Electrical Age -- Programming Advancements -- The Microprocessor Age -- The Modern Microprocessor -- 1-2 The Microprocessor-Based Personal Computer System -- The Memory and I/O System -- The Microprocessor -- 1-3 Number Systems -- Digits -- Positional Notation -- Conversion to Decimal -- Conversion from Decimal -- Binary-Coded Hexadecimal -- 1-4 Computer Data Formats -- ASCII and Unicode Data -- BCD (Binary-Coded Decimal) Data -- Byte-Sized Data -- Word-Sized Data -- Doubleword-Sized Data -- Real Numbers -- 1-5 Summary -- 1-6 Questions and Problems -- CHAPTER 2 THE MICROPROCESSOR AND ITS ARCHITECTURE -- Introduction/Chapter Objectives -- 2-1 Internal Microprocessor Architecture -- The Programming Model -- Multipurpose Registers -- 2-2 Real Mode Memory Addressing -- Segments and Offsets -- Default Segment and Offset Registers -- Segment and Offset Addressing Scheme Allows Relocation -- 2-3 Introduction to Protected Mode Memory Addressing -- Selectors and Descriptors -- Program-Invisible Registers -- 2-4 Memory Paging -- Paging Registers -- The Page Directory and Page Table -- 2-5 Flat Mode Memory -- 2-6 Summary -- 2-7 Questions and Problems -- CHAPTER 3 ADDRESSING MODES -- Introduction/Chapter Objectives -- 3-1 Data-Addressing Modes -- Register Addressing -- Immediate Addressing -- Direct Data Addressing -- Register Indirect Addressing -- Base-Plus-Index Addressing -- Register Relative Addressing -- Base Relative-Plus-Index Addressing -- Scaled-Index Addressing -- RIP Relative Addressing -- Data Structures -- 3-2 Program Memory-Addressing Modes -- Direct Program Memory Addressing -- Relative Program Memory Addressing -- Indirect Program Memory Addressing.
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note 3-3 Stack Memory-Addressing Modes -- 3-4 Summary -- 3-5 Questions and Problems -- CHAPTER 4 DATA MOVEMENT INSTRUCTIONS -- Introduction/Chapter Objectives -- 4-1 MOV Revisited -- Machine Language -- The 64-Bit Mode for the Pentium 4 and Core2 -- 4-2 PUSH/POP -- PUSH -- POP -- Initializing the Stack -- 4-3 Load-Effective Address -- LEA -- LDS, LES, LFS, LGS, and LSS -- 4-4 String Data Transfers -- The Direction Flag -- DI and SI -- LODS -- STOS -- MOVS -- INS -- OUTS -- 4-5 Miscellaneous Data Transfer Instructions -- XCHG -- LANF and SAHF -- XLAT -- IN and OUT -- MOVSX and MOVZX -- BSWAP -- CMOV -- 4-6 Segment Override Prefix -- 4-7 Assembler Detail -- Directives -- Memory Organization -- A Sample Program -- 4-8 Summary -- 4-9 Questions and Problems -- CHAPTER 5 ARITHMETIC AND LOGIC INSTRUCTIONS -- Introduction/Chapter Objectives -- 5-1 Addition, Subtraction, and Comparison -- Addition -- Subtraction -- Comparison -- 5-2 Multiplication and Division -- Multiplication -- Division -- 5-3 BCD and ASCII Arithmetic -- BCD Arithmetic -- ASCII Arithmetic -- 5-4 Basic Logic Instructions -- AND -- OR -- Test and Bit Test Instructions -- NOT and NEG -- 5-5 Shift and Rotate -- Shift -- Rotate -- Bit Scan Instructions -- 5-6 String Comparisons -- SCAS -- CMPS -- 5-7 Summary -- 5-8 Questions and Problems -- CHAPTER 6 PROGRAM CONTROL INSTRUCTIONS -- Introduction/Chapter Objectives -- 6-1 The Jump Group -- Unconditional Jump (JMP) -- Conditional Jumps and Conditional Sets -- LOOP -- 6-2 Controlling the Flow of the Program -- WHILE Loops -- REPEAT-UNTIL Loops -- 6-3 Procedures -- CALL -- RET -- 6-4 Introduction to Interrupts -- Interrupt Vectors -- Interrupt Instructions -- Interrupt Control -- Interrupts in the Personal Computer -- 64-Bit Mode Interrupts -- 6-5 Machine Control and Miscellaneous Instructions -- Controlling the Carry Flag Bit -- WAIT -- HLT -- NOP.
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note LOCK Prefix -- ESC -- BOUND -- ENTER and LEAVE -- 6-6 Summary -- 6-7 Questions and Problems -- CHAPTER 7 USING ASSEMBLY LANGUAGE WITH C/C++ -- Introduction/Chapter Objectives -- 7-1 Using Assembly Language with C++ for 16-Bit DOS Applications -- Basic Rules and Simple Programs -- What Cannot Be Used from MASM Inside an_asm Block -- Using Character Strings -- Using Data Structures -- An Example of a Mixed-Language Program -- 7-2 Using Assembly Language with Visual C/C++ for 32-Bit Applications -- An Example that Uses Console I/O to Access the Keyboard and Display -- Directly Addressing I/O Ports -- Developing a Visual C++ Application for Windows -- 7-3 Mixed Assembly and C++ Objects -- Linking Assembly Language with Visual C++ -- Adding New Assembly Language Instructions to C/C++ Programs -- 7-4 Summary -- 7-5 Questions and Problems -- CHAPTER 8 PROGRAMMING THE MICROPROCESSOR -- Introduction/Chapter Objectives -- 8-1 Modular Programming -- The Assembler and Linker -- PUBLIC and EXTRN -- Libraries -- Macros -- 8-2 Using the Keyboard and Video Display -- Reading the Keyboard -- Using the Video Display -- Using a Timer in a Program -- The Mouse -- 8-3 Data Conversions -- Converting from Binary to ASCII -- Converting from ASCII to Binary -- Displaying and Reading Hexadecimal Data -- Using Lookup Tables for Data Conversions -- An Example Program Using a Lookup Table -- 8-4 Disk Files -- Disk Organization -- File Names -- Sequential Access Files -- Random Access Files -- 8-5 Example Programs -- Time/Date Display Program -- Numeric Sort Program -- Data Encryption -- 8-6 Summary -- 8-7 Questions and Problems -- CHAPTER 9 8086/8088 HARDWARE SPECIFICATIONS -- Introduction/Chapter Objectives -- 9-1 Pin-Outs and the Pin Functions -- The Pin-Out -- Power Supply Requirements -- DC Characteristics -- Pin Connections -- 9-2 Clock Generator (8284A).
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note The 8284A Clock Generator -- Operation of the 8284A -- 9-3 Bus Buffering and Latching -- Demultiplexing the Buses -- The Buffered System -- 9-4 Bus Timing -- Basic Bus Operation -- Timing in General -- Read Timing -- Write Timing -- 9-5 Ready and the Wait State -- The READY Input -- RDY and the 8284A -- 9-6 Minimum Mode versus Maximum Mode -- Minimum Mode Operation -- Maximum Mode Operation -- The 8288 Bus Controller -- Pin Functions -- 9-7 Summary -- 9-8 Questions and Problems -- CHAPTER 10 MEMORY INTERFACE -- Introduction/Chapter Objectives -- 10-1 Memory Devices -- Memory Pin Connections -- ROM Memory -- Static RAM (SRAM) Devices -- Dynamic RAM (DRAM) Memory -- 10-2 Address Decoding -- Why Decode Memory? -- Simple NAND Gate Decoder -- The 3-to-8 Line Decoder (74LS138) -- The Dual 2-to-4 Line Decoder (74LS139) -- PLD Programmable Decoders -- 10-3 8088 and 80188 (8-Bit) Memory Interface -- Basic 8088/80188 Memory Interface -- Interfacing Flash Memory -- Error Correction -- 10-4 8086, 80186, 80286, and 80386SX (16-Bit) Memory Interface -- 16-Bit Bus Control -- 10-5 80386DX and 80486 (32-Bit) Memory Interface -- Memory Banks -- 32-Bit Memory Interface -- 10-6 Pentium through Core2 (64-Bit) Memory Interface -- 64-Bit Memory Interface -- 10-7 Dynamic RAM -- DRAM Revisited -- EDO Memory -- SDRAM -- DDR -- DRAM Controllers -- 10-8 Summary -- 10-9 Questions and Problems -- CHAPTER 11 BASIC I/O INTERFACE -- Introduction/Chapter Objectives -- 11-1 Introduction to I/O Interface -- The I/O Instructions -- Isolated and Memory-Mapped I/O -- Personal Computer I/O Map -- Basic Input and Output Interfaces -- Handshaking -- Notes about Interfacing Circuitry -- 11-2 I/O Port Address Decoding -- Decoding 8-Bit I/O Port Addresses -- Decoding 16-Bit I/O Port Addresses -- 8- and 16-Bit-Wide I/O Ports -- 32-Bit-Wide I/O Ports -- 11-3 The Programmable Peripheral Interface.
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note Basic Description of the 82C55 -- Programming the 82C55 -- Mode 0 Operation -- An LCD Display, Interfaced to the 82C55 -- Mode 1 Strobed Input -- Signal Definitions for Mode 1 Strobed Input -- Mode 1 Strobed Output -- Signal Definitions for Mode 1 Strobed Output -- Mode 2 Bidirectional Operation -- Signal Definitions for Bidirectional Mode 2 -- 82C55 Mode Summary -- The Serial EEPROM Interface -- 11-4 8254 Programmable Interval Timer -- 8254 Functional Description -- Pin Definitions -- Programming the 8254 -- DC Motor Speed and Direction Control -- 11-5 16550 Programmable Communications Interface -- Asynchronous Serial Data -- 16550 Functional Description -- 16550 Pin Functions -- Programming the 16550 -- 11-6 Analog-to-Digital (ADC) and Digital-to-Analog (DAC) Converters -- The DAC0830 Digital-to-Analog Converter -- The ADC080X Analog-to-Digital Converter -- Using the ADC0804 and the DAC0830 -- 11-7 Summary -- 11-8 Questions and Problems -- CHAPTER 12 INTERRUPTS -- Introduction/Chapter Objectives -- 12-1 Basic Interrupt Processing -- The Purpose of Interrupts -- Interrupts -- Interrupt Instructions: BOUND, INTO, INT, INT 3, and IRET -- The Operation of a Real Mode Interrupt -- Operation of a Protected Mode Interrupt -- Interrupt Flag Bits -- Storing an Interrupt Vector in the Vector Table -- 12-2 Hardware Interrupts -- INTR and INTA -- The 82C55 Keyboard Interrupt -- 12-3 Expanding the Interrupt Structure -- Using the 74ALS244 to Expand Interrupts -- Daisy-Chained Interrupt -- 12-4 8259A Programmable Interrupt Controller -- General Description of the 8259A -- Connecting a Single 8259A -- Cascading Multiple 8259As -- Programming the 8259A -- 8259A Programming Example -- 12-5 Interrupt Examples -- Real-Time Clock -- Interrupt-Processed Keyboard -- 12-6 Summary -- 12-7 Questions and Problems -- CHAPTER 13 DIRECT MEMORY ACCESS AND DMA-CONTROLLED I/O.
505 8# - FORMATTED CONTENTS NOTE
Formatted contents note Introduction/Chapter Objectives.
590 ## - LOCAL NOTE (RLIN)
Local note Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2018. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries.
655 #4 - INDEX TERM--GENRE/FORM
Genre/form data or focus term Electronic books.
776 08 - ADDITIONAL PHYSICAL FORM ENTRY
Display text Print version:
Main entry heading Brey, Barry B.
Title Intel Microprocessors, The
Place, publisher, and date of publication Noida : Pearson India,c2008
797 2# - LOCAL ADDED ENTRY--CORPORATE NAME (RLIN)
Corporate name or jurisdiction name as entry element ProQuest (Firm)
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier <a href="https://ebookcentral.proquest.com/lib/cethalassery/detail.action?docID=5125712">https://ebookcentral.proquest.com/lib/cethalassery/detail.action?docID=5125712</a>
Public note Click to View
942 ## - ADDED ENTRY ELEMENTS (KOHA)
Source of classification or shelving scheme Dewey Decimal Classification
Koha item type Books
Holdings
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    Dewey Decimal Classification Online access     CENTRAL LIBRARY Digital Library Digital Library 04/01/2019   004.165 BRE-I8 E0087 04/01/2019 04/01/2019 E- Books
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