8086 Microprocessor. (Record no. 25560)
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| 000 -LEADER | |
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| fixed length control field | 07518nam a22003613i 4500 |
| 001 - CONTROL NUMBER | |
| control field | EBC5125890 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | MiAaPQ |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20190104160828.0 |
| 006 - FIXED-LENGTH DATA ELEMENTS--ADDITIONAL MATERIAL CHARACTERISTICS--GENERAL INFORMATION | |
| fixed length control field | m o d | |
| 007 - PHYSICAL DESCRIPTION FIXED FIELD--GENERAL INFORMATION | |
| fixed length control field | cr cnu|||||||| |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 181231s2010 xx o ||||0 eng d |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 9788131752722 |
| Qualifying information | (electronic bk.) |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (MiAaPQ)EBC5125890 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (Au-PeEL)EBL5125890 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (CaONFJC)MIL266316 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (OCoLC)1024254803 |
| 040 ## - CATALOGING SOURCE | |
| Original cataloging agency | MiAaPQ |
| Language of cataloging | eng |
| Description conventions | rda |
| -- | pn |
| Transcribing agency | MiAaPQ |
| Modifying agency | MiAaPQ |
| 082 ## - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Edition number | 23rd |
| Classification number | 005.26 |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Das, Layla b. |
| 245 10 - TITLE STATEMENT | |
| Title | 8086 Microprocessor. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | 1 online resource (665 pages) |
| 505 0# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Cover -- The X86 Microprocessors -- Copyright -- Contents -- Preface -- About the Author -- 0 Basics of Computer Systems -- 0.1 A Brief History of Microprocessors -- 0.2 Basics of Computer Architecture -- 0.3 Computer Languages -- 0.4 RISC and CISC Architectures -- 0.5 Number Systems -- 0.6 Number Format Conversions -- 0.7 Computer Arithmetic -- 0.8 Units of Memory Capacity -- 0.9 The 8085 Microprocessor -- Key Points of this Chapter -- Questions -- Exercise -- 1 The Architecture of 8086 -- 1.1 Internal Block Diagram of the 8086 -- 1.2 The Execution Unit -- 1.3 Bus Interface Unit -- 1.4 Addressing Modes -- Key Points of this Chapter -- Questions -- Exercise -- 2 Programming Concepts - I -- 2.1 The Assembly Process -- 2.2 Assemblers for x86 -- 2.3 Memory Models -- 2.4 Instruction Design -- Key Points of this Chapter -- Questions -- Exercise -- 3 Programming Concepts - II -- 3.1 Approaches to Programming -- 3.2 Data Transfer Instructions -- 3.3 Branch Instructions -- 3.4 Arithmetic Instructions -- 3.5 Logical Instructions -- 3.6 Shift and Rotate Instructions -- Key Points of this Chapter -- Questions -- Exercise -- 4 Programming Concepts - III -- 4.1 String Instructions -- 4.2 Procedures -- 4.3 Macros -- 4.4 Number Format Conversions -- 4.5 ASCII Operations -- 4.6 Conversions for Computations and Display/Entry -- 4.7 Signed Number Arithmetic -- 4.8 Programming Using High Level Language Constructs -- Key Points of this Chapter -- Questions -- Exercise -- 5 Programming Concepts - IV -- 5.1 Input/Output Programming -- 5.2 I/O Instructions -- 5.3 Modular Programming -- 5.4 Programming in C with Assembly Modules -- Key Points of this Chapter -- Questions -- Exercise -- 6 The Hardware Structure of 8086 -- 6.1 Pin Configuration -- 6.2 Clock -- 6.3 Other Processor Activities -- 6.4 Maximum Mode -- 6.5 Instruction Cycle -- Key Points of this Chapter. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | Questions -- Exercise -- 7 Memory and I/O Decoding -- 7.1 Memory Device Pins -- 7.2 Memory Address Decoding -- 7.3 Memory Banks -- 7.4 I/O Address Decoding -- Key Points of this Chapter -- Questions -- Exercise -- 8 The Interrupt Structure of 8086 -- 8.1 Interrupts of 8086 -- 8.2 Dedicated Interrupt Types -- 8.3 Software Interrupts -- 8.4 Hardware Interrupts -- 8.5 Priority of Interrupts -- 8.6 Interrupt Type Allocation for Current PCs -- 8.7 BIOS 10H Functions -- 8.8 Addressing Video Memory Directly -- 8.9 Keyboard Interfacing -- 8.10 Hooking an Interrupt -- Key Points of this Chapter -- Questions -- Exercise -- 9 Peripheral Interfacing - I -- 9.1 Trainer Kit -- 9.2 Programmable Peripheral Interface (PPI)-8255A -- 9.3 Modes of Operation -- 9.4 Mode 0 -- 9.5 Mode 1 -- 9.6 Mode 2 (Strobed Bidirectional Bus I/O) -- 9.7 Centronics Printer Interface -- 9.8 Interfacing an Analog to Digital Converter to the 8086 -- 9.9 Interfacing to a Digital to Analog Converter -- 9.10 Interfacing Liquid Crystal Displays to the 8086 -- 9.11 Interfacing a Stepper Motor to the 8086 -- 9.12 Hex Keyboard Interfacing -- 9.13 Interfacing Led Displays -- Key Points of this Chapter -- Questions -- Exercise -- 10 Peripheral Interfacing - II -- 10.1 The Programmable Interval Timer 8253/8254 -- 10.2 The Programmable Keyboard Display Interface - 8279 -- 10.3 The Programmable Interrupt Controller (PIC) 8259 -- 10.4 Cascade Mode -- Key Points of this Chapter -- Questions -- Exercise -- 11 Peripheral Interfacing - III -- 11.1 Serial Communication Principles -- 11.2 Simplex, Half Duplex and Full Duplex Communication -- 11.3 The Programmable Serial Communication Interface -- 11.4 Internal Reset on Power Up -- 11.5 Direct Memory Access -- 11.6 The DMA Controller - 8237 -- 11.7 DMA and IBM-PC -- 11.8 PCI Based Computers -- Key Points of this Chapter -- Questions -- Exercise. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | 12 Semiconductor Memory Devices -- 12.1 Semiconductor Memory -- 12.2 Dynamic RAM -- 12.3 Synchronous DRAM (SDRAM) -- 12.4 ROM (Read Only Memory) -- 12.5 Cache Memory -- 12.6 Mapping Techniques -- 12.7 Cache and the x86 Family -- Key Points of this Chapter -- Questions -- Exercise -- 13 Multiprocessor Configurations -- 13.1 Multiprocessor Systems -- 13.2 Multiprocessing Using 8086 -- 13.3 The 8086 and 8089 in a Tightly Coupled Configuration -- 13.4 Loosely Coupled Configurations and Bus Arbitration -- 13.5 Bus Arbitration Using the 8289 Bus Arbiter IC -- 13.6 The Arithmetic Co-Processor 8087 -- Key Points of this Chapter -- Questions -- Exercise -- 14 80186 - The Embedded Microprocessor -- 14.1 Additions in the Instruction Set -- 14.2 Instruction Set Enhancements -- 14.3 Block Diagram of the 80186 -- 14.4 Programming the Timer Unit -- 14.5 Programming -- Key Points of this Chapter -- Questions -- Exercise -- 15 The 80286 and 80386 Processors -- 15.1 The 80286 Processor -- 15.2 The 80386 -- 15.3 Internal Architecture -- 15.4 Programming Enhancements -- 15.5 Hardware Features of 80386 -- 15.6 Virtual Memory -- 15.7 Memory Management Unit -- 15.8 Converting a Logical Address to a Physical Address -- 15.9 Calculating the size of the Logical Address Space -- 15.10 Protection -- 15.11 Multi Tasking -- 15.12 Interrupts of 80386 -- 15.13 Privileged Instructions -- 15.14 Conclusion -- Key Points of this Chapter -- Questions -- Exercise -- 16 The Pentium Processor -- 16.1 The Enhanced Features of 80486 -- 16.2 Data Alignment -- 16.3 The Pentium Processor -- 16.4 Pentium Pro -- 16.5 Pentium-II And Pentium-III -- 16.6 Pentium-IV -- 16.7 Latest Trends in Microprocessor Design -- 16.8 Multi-Core Technology and Intel -- 16.9 Mobile Processors -- 16.10 Legacy Support -- Key Points of this Chapter -- Questions -- Exercise -- 17 The x86 Based Personal Computer. |
| 505 8# - FORMATTED CONTENTS NOTE | |
| Formatted contents note | 17.1 The Modern PC -- 17.2 The Mother Board -- 17.3 Chipset -- 17.4 Transfer Speed -- 17.5 Expansion Buses -- 17.6 ATA -- 17.7 Memory - SIMM and DIMM -- 17.8 System BIOS -- 17.9 New Motherboards -- 17.10 Other I/O Devices -- 17.11 PS/2 -- 17.12 Form Factors -- 17.13 Laptops -- Key Points of this Chapter -- Questions -- Exercise -- Appendix A -- Appendix B -- Appendix C -- Appendix D -- Appendix E -- Bibliography -- Index. |
| 520 ## - SUMMARY, ETC. | |
| Summary, etc | The book is designed for an undergraduate course on 16-bit microprocessor and Pentium. The text comprehensively covers both the hardware and software aspects of the subject with equal emphasis on architecture, programming and interfacing. |
| 590 ## - LOCAL NOTE (RLIN) | |
| Local note | Electronic reproduction. Ann Arbor, Michigan : ProQuest Ebook Central, 2018. Available via World Wide Web. Access may be limited to ProQuest Ebook Central affiliated libraries. |
| 655 #4 - INDEX TERM--GENRE/FORM | |
| Genre/form data or focus term | Electronic books. |
| 776 08 - ADDITIONAL PHYSICAL FORM ENTRY | |
| Display text | Print version: |
| Main entry heading | Das, Layla b |
| Title | 8086 Microprocessor:Architecture, Programming And Interfacing, The |
| Place, publisher, and date of publication | Noida : Pearson India,c2010 |
| 797 2# - LOCAL ADDED ENTRY--CORPORATE NAME (RLIN) | |
| Corporate name or jurisdiction name as entry element | ProQuest (Firm) |
| 856 40 - ELECTRONIC LOCATION AND ACCESS | |
| Uniform Resource Identifier | <a href="https://ebookcentral.proquest.com/lib/cethalassery/detail.action?docID=5125890">https://ebookcentral.proquest.com/lib/cethalassery/detail.action?docID=5125890</a> |
| Public note | Click to View |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | Dewey Decimal Classification |
| Koha item type | Books |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Materials specified (bound volume or other part) | Damaged status | Not for loan | Home library | Current library | Shelving location | Date acquired | Total Checkouts | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Dewey Decimal Classification | Online access | CENTRAL LIBRARY | Digital Library | Digital Library | 04/01/2019 | 005.26 DAS-M | E0094 | 04/01/2019 | 04/01/2019 | E- Books |